1. Field of the Invention
The present invention relates to a semiconductor memory including dynamic memory cells and having a partial refresh mode.
2. Description of the Related Art
The memory capacity necessary for a hand-held terminal such as a mobile phone has been increasing year by year. Under such circumstances, a dynamic RAM (hereinafter, referred to as a DRAM) has come into use as a work memory of a hand-held terminal in place of a conventional static RAM (hereinafter, referred to as a SRAM). Chip size of a DRAM can be reduced since the number of elements constituting each memory cell thereof is smaller than that of a SRAM, and thus chip cost of the DRAM can be made lower than that of a SRAM.
Power consumption of a semiconductor memory mounted on a hand-held terminal is required to be low so as to enable long use of its battery. A DRAM as opposed to a SRAM requires a periodic refresh operation in order to retain data written to memory cells. Therefore, in a case where a DRAM is used as a work memory of a hand-held terminal, power is consumed only by retaining data even while the hand-held terminal is not in use, resulting in consumption of a battery.
In order to reduce power consumption in a standby state (in a low power mode) of a DRAM, a partial refresh technology has been developed (See Japanese Unexamined Patent Application Publication No. 2000-298982 and so on). In a DRAM having a partial refresh function, data of only limited memory cells are retained in a standby state (a partial refresh mode), thereby reducing the number of memory cells to be refreshed. Lessening the number of the memory cells to be refreshed decreases the number of times of refresh operations, enabling reduced power consumption during the partial refresh mode.